—As the complexity of the integrated circuits increases, they become more susceptible to manufacturing faults, decreasing the total process yield. Thus, it would be desirable to ...
Nima Honarmand, A. Shahabi, Hasan Sohofi, Maghsoud...
Register Transfer Level (RTL) synthesis model which simplified the design of clocked circuits allowed design automation boost and VLSI progress for more than a decade. Shrinking t...
Alexander B. Smirnov, Alexander Taubin, Ming Su, M...
High performance integrated circuits are now reaching the 100-plus watt regime, and power delivery and power grid signal integrity have become critical. Analyzing the performance ...
Haifeng Qian, Sani R. Nassif, Sachin S. Sapatnekar
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
A scalable laser-based timing analysis technique we call laser assisted device alteration (LADA) is introduced for the rapid isolation and analysis of defect-free performance limi...