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» On the Complexity of Circuit Satisfiability
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ICCAD
2006
IEEE
134views Hardware» more  ICCAD 2006»
14 years 6 months ago
A delay fault model for at-speed fault simulation and test generation
We describe a transition fault model, which is easy to simulate under test sequences that are applied at-speed, and provides a target for the generation of at-speed test sequences...
Irith Pomeranz, Sudhakar M. Reddy
ICCAD
2006
IEEE
125views Hardware» more  ICCAD 2006»
14 years 6 months ago
Leveraging protocol knowledge in slack matching
Stalls, due to mis-matches in communication rates, are a major performance obstacle in pipelined circuits. If the rate of data production is faster than the rate of consumption, t...
Girish Venkataramani, Seth Copen Goldstein
ICCAD
2002
IEEE
175views Hardware» more  ICCAD 2002»
14 years 6 months ago
Efficient model order reduction via multi-node moment matching
- The new concept of Multi-node Moment Matching (MMM) is introduced in this paper. The MMM technique simultaneously matches the moments at several nodes of a circuit using explicit...
Yehea I. Ismail
FMCAD
2009
Springer
14 years 3 months ago
Retiming and resynthesis with sweep are complete for sequential transformation
— There is a long history of investigations and debates on whether a sequence of retiming and resynthesis is complete for all sequential transformations (on steady states). It ha...
Hai Zhou
ASAP
2008
IEEE
167views Hardware» more  ASAP 2008»
14 years 3 months ago
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms
Process technology has reduced in size such that it is possible to implement complete applicationspecific architectures as Systems-on-Chip (SoCs) using both Application-Specific I...
David Dickin, Lesley Shannon