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» On the Complexity of Register Coalescing
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VLSID
2004
IEEE
135views VLSI» more  VLSID 2004»
14 years 8 months ago
Integrating Self Testability with Design Space Exploration by a Controller based Estimation Technique
Recent research for testable designs has focussed on inserting test structures by re-arranging an Register-TransferLevel (RTL) data path generated from a behavioural description t...
M. S. Gaur, Mark Zwolinski
VLSID
2002
IEEE
177views VLSI» more  VLSID 2002»
14 years 8 months ago
RTL-Datapath Verification using Integer Linear Programming
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
Raik Brinkmann, Rolf Drechsler
CCGRID
2009
IEEE
14 years 2 months ago
Towards Visualization Scalability through Time Intervals and Hierarchical Organization of Monitoring Data
Highly distributed systems such as Grids are used today to the execution of large-scale parallel applications. The behavior analysis of these applications is not trivial. The comp...
Lucas Mello Schnorr, Guillaume Huard, Philippe Oli...
ICRA
2009
IEEE
83views Robotics» more  ICRA 2009»
14 years 2 months ago
Real-time correlative scan matching
— Scan matching, the problem of registering two laser scans in order to determine the relative positions from which the scans were obtained, is one of the most heavily relied-upo...
Edwin B. Olson
ICB
2009
Springer
355views Biometrics» more  ICB 2009»
14 years 2 months ago
3D Signatures for Fast 3D Face Recognition
We propose a vector representation (called a 3D signature) for 3D face shape in biometrics applications. Elements of the vector correspond to fixed surface points in a face-centere...
Chris Boehnen, Tanya Peters, Patrick J. Flynn