A novel approach for reducing power consumption in checkers used for concurrent error detection is presented. Spatial correlations between the outputs of the circuit that drives t...
Abstract— This paper describes the fast-scale bifurcation phenomena of a single-stage power-factor-correction (PFC) power supply which is commonly used in low power applications....
Xiaoqun Wu, Chi Kong Tse, Octavian Dranga, Junan L...
The need to reuse the performance macromodels of an analog circuit topology challenges existing regression based modeling techniques. A model of good reusability should have a num...
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...
Amit Agarwal, Chris H. Kim, Saibal Mukhopadhyay, K...
Abstract-- Network processors (NPs) have emerged as successful platforms to providing both high performance and flexibility in building powerful routers. Typical NPs incorporate mu...