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CORR
2002
Springer
93views Education» more  CORR 2002»
13 years 7 months ago
Synthesis of Low-Power Digital Circuits Derived from Binary Decision Diagrams
-- This paper introduces a novel method for synthesizing digital circuits derived from Binary Decision Diagrams (BDDs) that can yield to reduction in power dissipation. The power r...
Denis V. Popel
DAC
2009
ACM
13 years 11 months ago
Fast vectorless power grid verification using an approximate inverse technique
Power grid verification in modern integrated circuits is an integral part of early system design where adjustments can be most easily incorporated. In this work, we describe an ea...
Nahi H. Abdul Ghani, Farid N. Najm
ICCAD
1996
IEEE
131views Hardware» more  ICCAD 1996»
13 years 11 months ago
Multi-level logic optimization for low power using local logic transformations
In this paper we present an ecient technique to reduce the switching activity in a CMOS combinational logic network based on local logic transformations. These transformations con...
Qi Wang, Sarma B. K. Vrudhula
ICCAD
1997
IEEE
99views Hardware» more  ICCAD 1997»
13 years 12 months ago
High-level area and power estimation for VLSI circuits
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
Mahadevamurty Nemani, Farid N. Najm
DAC
2006
ACM
14 years 8 months ago
Charge recycling in MTCMOS circuits: concept and analysis
Designing an energy efficient power gating structure is an important and challenging task in Multi-Threshold CMOS (MTCMOS) circuit design. In order to achieve a very low power des...
Ehsan Pakbaznia, Farzan Fallah, Massoud Pedram