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» On the Design of IEEE Compliant Floating Point Units
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ICPP
1999
IEEE
14 years 17 hour ago
Impact on Performance of Fused Multiply-Add Units in Aggressive VLIW Architectures
Loops are the main time consuming part of programs based on floating point computations. The performance of the loops is limited either by recurrences in the computation or by the...
David López, Josep Llosa, Eduard Ayguad&eac...
ASAP
2006
IEEE
121views Hardware» more  ASAP 2006»
13 years 11 months ago
Reconfigurable Fixed Point Dense and Sparse Matrix-Vector Multiply/Add Unit
In this paper, we propose a reconfigurable hardware accelerator for fixed-point-matrix-vector-multiply/add operations, capable to work on dense and sparse matrices formats. The pr...
Humberto Calderon, Stamatis Vassiliadis
ARITH
2009
IEEE
14 years 2 months ago
Computation of Decimal Transcendental Functions Using the CORDIC Algorithm
In this work we propose new decimal floating-point CORDIC algorithms for transcendental function evaluation. We show how these algorithms are mapped to a state of the art Decimal...
Álvaro Vázquez, Julio Villalba, Elis...
EGITALY
2006
13 years 9 months ago
Implementing mesh-based approaches for deformable objects on GPU
These latest years witnessed an impressive improvement of graphics hardware both in terms of features and in terms of computational power. This improvement can be easily observed ...
Guido Ranzuglia, Paolo Cignoni, Fabio Ganovelli, R...
DATE
2004
IEEE
89views Hardware» more  DATE 2004»
13 years 11 months ago
Improved Symoblic Simulation by Dynamic Funtional Space Partitioning
In this paper, we provide a flexible and automatic method to partition the functional space for efficient symbolic simulation. We utilize a 2-tuple list representation as the basi...
Tao Feng, Li-C. Wang, Kwang-Ting Cheng, Chih-Chan ...