115 search results - page 7 / 23 » On the Design of IEEE Compliant Floating Point Units |
ASAP
2008
IEEE
14 years 2 months ago
2008
IEEE
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
—In this paper, we propose a cost-effective and low-power 64-point fast Fourier transform (FFT)/inverse FFT (IFFT) architecture and chip adopting the retrenched 8-point FFT/IFFT ...
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper presents a method that offers a uniform treatment for bit-width optimisation of both fixed-point and floating-point designs. Our work utilises automatic differentiation...
ISLPED
1997
ACM
13 years 11 months ago
1997
ACM
Significand pre-alignment is a pre requisite for floating point additions. This paper1 addresses the architectural design and energy delay evaluation of a Low Power Barrel Switch ...
FPL
2007
Springer
14 years 1 months ago
2007
Springer
This paper presents a novel architecture for domain-specific FPGA devices. This architecture can be optimised for both speed and density by exploiting domain-specific informatio...