372 search results - page 11 / 75 » On the Fault Testing for Reversible Circuits |
ITC
1995
IEEE
14 years 3 days ago
1995
IEEE
A nalog circuit implementations of fuzzy logic are characterized by performing logical connectives of analog signals. They can be considered as generalization of digital circuits ...
ATS
2000
IEEE
14 years 1 months ago
2000
IEEE
We present a new test generation procedure for sequential circuits using newly traversed state and newly detected fault information obtained between successive iterations of vecto...
DFT
2007
IEEE
14 years 2 months ago
2007
IEEE
The paper discusses a novel approach for reduction of fault detection latency in a selfchecking sequential circuit. The Authors propose decomposing the finite state machine (FSM) ...
DATE
2000
IEEE
14 years 1 months ago
2000
IEEE
We describe a method for on-chip generation of weighted test sequences for synchronous sequential circuits. For combinational circuits, three weights, 0, 0.5 and 1, are sufficien...
DATE
1999
IEEE
14 years 27 days ago
1999
IEEE
In this paper we show that the already known method of using multiplexers for making the inputs and outputs of the embedded blocks accessible by the primary ports of the Integrate...