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» On the Fault Testing for Reversible Circuits
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DSD
2010
IEEE
111views Hardware» more  DSD 2010»
13 years 7 months ago
Faults Coverage Improvement Based on Fault Simulation and Partial Duplication
— A method how to improve the coverage of single faults in combinational circuits is proposed. The method is based on Concurrent Error Detection, but uses a fault simulation to f...
Jaroslav Borecky, Martin Kohlik, Hana Kubatova, Pa...
ICES
2000
Springer
140views Hardware» more  ICES 2000»
14 years 6 days ago
Evolving Cellular Automata for Self-Testing Hardware
Testing is a key issue in the design and production of digital circuits: the adoption of BIST (Built-In Self-Test) techniques is increasingly popular, but requires efficient algori...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
AICCSA
2006
IEEE
107views Hardware» more  AICCSA 2006»
13 years 10 months ago
Exciting Stuck-Open faults in CMOS Circuits Using ILP Techniques
To excite a stuck-open fault in a CMOS combinational circuit, it is only necessary that the output of the gate containing the fault takes on opposite values during the application...
Fadi A. Aloul, Assim Sagahyroon, Bashar Al Rawi
DATE
1999
IEEE
144views Hardware» more  DATE 1999»
14 years 28 days ago
A Method to Diagnose Faults in Linear Analog Circuits using an Adaptive Tester
This work presents a new diagnosis method for use in an adaptive analog tester. The tester is able to detect faults in any linear circuit by learning a reference behavior in a fir...
Érika F. Cota, Luigi Carro, Marcelo Lubasze...
DATE
1998
IEEE
88views Hardware» more  DATE 1998»
14 years 27 days ago
Functional Scan Chain Testing
Functional scan chains are scan chains that have scan paths through a circuit's functional logic and flip-flops. Establishing functional scan paths by test point insertion (T...
Douglas Chang, Kwang-Ting Cheng, Malgorzata Marek-...