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» On the Fault Testing for Reversible Circuits
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VTS
2008
IEEE
104views Hardware» more  VTS 2008»
14 years 1 months ago
Signature Rollback - A Technique for Testing Robust Circuits
Dealing with static and dynamic parameter variations has become a major challenge for design and test. To avoid unnecessary yield loss and to ensure reliable system operation a ro...
Uranmandakh Amgalan, Christian Hachmann, Sybille H...
DAC
2007
ACM
14 years 8 months ago
Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
INFSOF
2006
103views more  INFSOF 2006»
13 years 7 months ago
Improving test quality using robust unique input/output circuit sequences (UIOCs)
In finite state machine (FSM) based testing, the problem of fault masking in the unique input/output (UIO) sequence may degrade the test performance of the UIO based methods. This...
Qiang Guo, Robert M. Hierons, Mark Harman, Karnig ...
VTS
2003
IEEE
95views Hardware» more  VTS 2003»
14 years 25 days ago
Built-In Reseeding for Serial Bist
Reseeding is used to improve fault coverage in pseudo-random testing. Most of the work done on reseeding is based on storing the seeds in an external tester. Besides its high cost...
Ahmad A. Al-Yamani, Edward J. McCluskey
VTS
1999
IEEE
100views Hardware» more  VTS 1999»
13 years 11 months ago
Low-Cost On-Line Test for Digital Filters
A low-cost on-line test scheme for digital filters is proposed. The scheme uses an invariant of the digital filter, the frequency response at specific points, in order to detect p...
Ismet Bayraktaroglu, Alex Orailoglu