372 search results - page 48 / 75 » On the Fault Testing for Reversible Circuits |
ITC
1997
IEEE
13 years 11 months ago
1997
IEEE
Capacitive Leadframe testing is an effective approach for detecting faults in printed circuit boards. Capacitance measurements, however, are affected by mechanical variations duri...
ITC
2003
IEEE
14 years 24 days ago
2003
IEEE
We present an efficient algorithm for identification of two-line bridges in combinational CMOS logic that narrows down the two-line bridge candidates based on tester responses for...
VLSID
1993
IEEE
13 years 11 months ago
1993
IEEE
This paper discusses a Genetic Algorithm-based method of generating test vectorsfor detecting faults in combinational circuits. The GA-based approach combines the merits of two te...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
We provide a general formulation for the code-based test compression problem with fixed-length input blocks and propose a solution approach based on Evolutionary Algorithms. In c...
VTS
2006
IEEE
14 years 1 months ago
2006
IEEE
A new algorithm for identifying stuck faults in combinational circuits that cannot be detected by a given input sequence is presented. Other than pre and post-processing steps, ce...