281 search results - page 8 / 57 » On the Hardware Implementation Cost of Crypto-Processors Arc... |
FPL
2008
Springer
13 years 9 months ago
2008
Springer
This paper presents a novel method to perform on-the-fly attestation of hardware structures loaded to reconfigurable devices. Given that a loadable hardware structure to a reconfi...
ISQED
2002
IEEE
14 years 17 days ago
2002
IEEE
This paper presents a hybrid BIST architecture and methods for optimizing it to test systems-on-chip in a cost effective way. The proposed self-test architecture can be implemente...
FPL
2007
Springer
14 years 1 months ago
2007
Springer
This paper describes the mapping of a two-dimensional inverse discrete cosine transform (2-D IDCT) onto a wordlevel reconfigurable Montium R processor. This shows that the IDCT i...
IFIP12
2007
13 years 9 months ago
2007
In this paper an efficient architecture for natural language processing is presented, implemented in hardware using FPGAs (Field Programmable Gate Arrays). The system can receive s...
BIBE
2008
IEEE
14 years 2 months ago
2008
IEEE
— The Smith-Waterman algorithm is a dynamic programming method for determining optimal local alignments between nucleotide or protein sequences. However, it suffers from quadrati...