340 search results - page 14 / 68 » On the Interplay of Parallelization, Program Performance, an... |
ISVLSI
2008
IEEE
14 years 2 months ago
2008
IEEE
Powerful branch predictors along with a large branch target buffer (BTB) are employed in superscalar processors for instruction-level parallelism exploitation. However, the large ...
HPCA
2005
IEEE
14 years 2 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
CODES
2004
IEEE
14 years 4 days ago
2004
IEEE
The memory subsystem accounts for a significant portion of the aggregate energy budget of contemporary embedded systems. Moreover, there exists a large potential for optimizing th...
ALGOSENSORS
2006
Springer
14 years 4 days ago
2006
Springer
Programming Wireless Networks of Embedded Systems (WNES) is notoriously difficult and tedious. To simplify WNES programming, we propose Declarative Resource Naming (DRN) to progra...
JCC
2007
13 years 8 months ago
2007
Abstract: A new parallel algorithm has been developed for calculating the analytic energy derivatives of full accuracy second order Møller-Plesset perturbation theory (MP2). Its m...