473 search results - page 54 / 95 » On the Performance of Commit-Time-Locking Based Software Tra... |
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
In this paper is described a software technique allowing to detect soft errors occurring in processor-based digital architectures. The detection mechanism is based on a set of rul...
CODES
2006
IEEE
14 years 2 months ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
IPPS
2002
IEEE
14 years 1 months ago
2002
IEEE
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
POPL
2006
ACM
14 years 8 months ago
2006
ACM
The movement to multi-core processors increases the need for simpler, more robust parallel programming models. Atomic sections have been widely recognized for their ease of use. T...
CF
2005
ACM
13 years 10 months ago
2005
ACM
In this paper, we consider alternate ways of storing a sparse matrix and their effect on computational speed. They involve keeping both the indices and the non-zero elements in t...