Sciweavers

7629 search results - page 224 / 1526
» On the Performance of a Survivability Architecture for Netwo...
Sort
View
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
14 years 5 months ago
A Probabilistic-Based Design Methodology for Nanoscale Computation
As current silicon-based techniques fast approach their practical limits, the investigation of nanoscale electronics, devices and system architectures becomes a central research p...
R. Iris Bahar, Joseph L. Mundy, Jie Chen
APNOMS
2006
Springer
13 years 12 months ago
Configuration Management Policy in QoS-Constrained Grid Networks
Abstract. In Grid service, resource management is important to support capability for good quality and efficiency for the computing and storage service. In order to provide this re...
Hyewon Song, Chan-Hyun Youn, Changhee Han, Youngjo...
FPGA
1997
ACM
149views FPGA» more  FPGA 1997»
14 years 9 days ago
Signal Processing at 250 MHz Using High-Performance FPGA's
This paper describes an application in high-performance signal processing using reconfigurable computing engines: a 250 MHz cross-correlator for radio astronomy. Experimental resu...
Brian Von Herzen
MICRO
2000
IEEE
129views Hardware» more  MICRO 2000»
13 years 8 months ago
Architectural Considerations for CPU and Network Interface Integration
The popularity of the Internet and the emergence of broadband access networks is fueling the development of communications processors -- devices that integrate processing, network...
Charles D. Cranor, R. Gopalakrishnan, Peter Z. Onu...
APPINF
2003
13 years 9 months ago
Preventing Computational Chaos in Asynchronous Neural Networks
One of the primary advantages of artificial neural networks is their inherent ability to perform massively parallel, nonlinear signal processing. However, the asynchronous dynamics...
Jacob Barhen, Vladimir Protopopescu