173 search results - page 23 / 35 » On the Power of Deterministic and Sequential Communicating P... |
ISCA
2008
IEEE
14 years 1 months ago
2008
IEEE
We expect that many-core microprocessors will push performance per chip from the 10 gigaflop to the 10 teraflop range in the coming decade. To support this increased performance...
DATE
1999
IEEE
13 years 11 months ago
1999
IEEE
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
CSE
2011
IEEE
12 years 7 months ago
2011
IEEE
In this paper, we present a performance modeling framework based on memory bandwidth contention time and a parameterized communication model to predict the performance of OpenMP, M...
IMC
2004
ACM
14 years 28 days ago
2004
ACM
The capacity of today's network links, along with the heterogeneity of their traffic, is rapidly growing, more than the workstation’s processing power. This makes the task ...
INFOCOM
2005
IEEE
14 years 1 months ago
2005
IEEE
Packet Classification (PC) has been a critical data path function for many emerging networking applications. An interesting approach is the use of TCAM to achieve deterministic, hi...