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» On the Power of Networks of Evolutionary Processors
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VLSISP
1998
128views more  VLSISP 1998»
13 years 7 months ago
A Low Power DSP Engine for Wireless Communications
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
Ingrid Verbauwhede, Mihran Touriguian
PODC
2011
ACM
12 years 10 months ago
Robust network supercomputing without centralized control
Internet supercomputing is becoming an increasingly popular means for harnessing the power of a vast number of interconnected computers. This comes at a cost substantially lower t...
Seda Davtyan, Kishori M. Konwar, Alexander A. Shva...
TVLSI
2008
139views more  TVLSI 2008»
13 years 7 months ago
Ternary CAM Power and Delay Model: Extensions and Uses
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
Banit Agrawal, Timothy Sherwood
HPCA
2009
IEEE
14 years 8 months ago
Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy
Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
Niti Madan, Li Zhao, Naveen Muralimanohar, Anirudd...
ICCAD
2003
IEEE
210views Hardware» more  ICCAD 2003»
14 years 4 months ago
Generalized Network Flow Techniques for Dynamic Voltage Scaling in Hard Real-Time Systems
Energy consumption is an important performance parameter for portable and wireless embedded systems. However, energy consumption must be carefully balanced with real-time responsi...
Vishnu Swaminathan, Krishnendu Chakrabarty