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EUROMICRO
2002
IEEE
14 years 2 months ago
A Sum of Absolute Differences Implementation in FPGA Hardware
In this paper, we propose a new hardware unit that performs a 16 × 1 SAD operation. The hardware unit is intended to augment a general-purpose core. Further, we show that the 16 ...
Stephan Wong, Stamatis Vassiliadis, Sorin Cotofana
GLVLSI
2002
IEEE
106views VLSI» more  GLVLSI 2002»
14 years 2 months ago
A low power direct digital frequency synthesizer with 60 dBc spectral purity
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
J. M. Pierre Langlois, Dhamin Al-Khalili
ICPADS
2002
IEEE
14 years 2 months ago
Evaluating and Improving Performance of Multimedia Applications on Simultaneous Multi-Threading
This paper presents the study and results of running several core multimedia applications on a simultaneous multithreading (SMT) architecture, including some detailed analysis ran...
Yen-Kuang Chen, Eric Debes, Rainer Lienhart, Matth...
ISCA
2002
IEEE
102views Hardware» more  ISCA 2002»
14 years 2 months ago
Implementing Optimizations at Decode Time
The number of pipeline stages separating dynamic instruction scheduling from instruction execution has increased considerably in recent out-of-order microprocessor implementations...
Ilhyun Kim, Mikko H. Lipasti
ISCAS
2002
IEEE
111views Hardware» more  ISCAS 2002»
14 years 2 months ago
CASCADE - configurable and scalable DSP environment
As the complexity of embedded systems grows rapidly, it is common to accelerate critical tasks with hardware. Designers usually use off-the-shelf components or licensed IP cores t...
Tay-Jyi Lin, Chein-Wei Jen