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CP
2010
Springer
13 years 5 months ago
Towards Parallel Non Serial Dynamic Programming for Solving Hard Weighted CSP
We introduce a parallelized version of tree-decomposition based dynamic programming for solving difficult weighted CSP instances on many cores. A tree decomposition organizes cost ...
David Allouche, Simon de Givry, Thomas Schiex
ICDM
2005
IEEE
161views Data Mining» more  ICDM 2005»
14 years 1 months ago
Making Logistic Regression a Core Data Mining Tool with TR-IRLS
Binary classification is a core data mining task. For large datasets or real-time applications, desirable classifiers are accurate, fast, and need no parameter tuning. We presen...
Paul Komarek, Andrew W. Moore
ITC
2000
IEEE
124views Hardware» more  ITC 2000»
14 years 3 days ago
Wrapper design for embedded core test
A wrapper is a thin shell around the core, that provides the switching between functional, and core-internal and core-external test modes. Together with a test access mechanism (T...
Yervant Zorian, Erik Jan Marinissen, Maurice Lousb...
DATE
2002
IEEE
117views Hardware» more  DATE 2002»
14 years 21 days ago
Effective Software Self-Test Methodology for Processor Cores
Software self-testing for embedded processor cores based on their instruction set, is a topic of increasing interest since it provides an excellent test resource partitioning tech...
Nektarios Kranitis, Antonis M. Paschalis, Dimitris...
ISSS
2000
IEEE
91views Hardware» more  ISSS 2000»
14 years 3 days ago
Instruction-based System-level Power Evaluation of System-On-A-Chip Peripheral Cores
Various system-level core-based power evaluation approaches for core types like microprocessors, caches, main memories, and buses, have been proposed in the past. Approaches for o...
Tony Givargis, Frank Vahid, Jörg Henkel