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DAC
2001
ACM
14 years 8 months ago
MetaCores: Design and Optimization Techniques
Currently, hardware intellectual property (IP) is delivered at vels of abstraction: hard, firm, and soft. In order to further enhance performance, efficiency, and flexibility of I...
Seapahn Meguerdichian, Farinaz Koushanfar, Advait ...
AHS
2006
IEEE
142views Hardware» more  AHS 2006»
14 years 1 months ago
On-Chip Evolution Using a Soft Processor Core Applied to Image Recognition
To increase the flexibility of single-chip evolvable hardware systems, we explore possibilities of systems with the evolutionary algorithm implemented in software on an onchip pr...
Kyrre Glette, Jim Torresen, Moritoshi Yasunaga, Yo...
VTS
2002
IEEE
113views Hardware» more  VTS 2002»
14 years 19 days ago
LI-BIST: A Low-Cost Self-Test Scheme for SoC Logic Cores and Interconnects
For deep sub-micron system-on-chips (SoC), interconnects are critical determinants of performance, reliability and power. Buses and long interconnects being susceptible to crossta...
Krishna Sekar, Sujit Dey
ICCV
2007
IEEE
14 years 9 months ago
Out-of-Core Bundle Adjustment for Large-Scale 3D Reconstruction
Large-scale 3D reconstruction has recently received much attention from the computer vision community. Bundle adjustment is a key component of 3D reconstruction problems. However,...
Kai Ni, Drew Steedly, Frank Dellaert
DATE
2004
IEEE
138views Hardware» more  DATE 2004»
13 years 11 months ago
STEPS: Experimenting a New Software-Based Strategy for Testing SoCs Containing P1500-Compliant IP Cores
This paper presents STEPS, an innovative softwarebased approach for testing P1500-compliant SoCs. STEPS is based on the concept that the ATE is not considered as an initiator appl...
Mounir Benabdenbi, Alain Greiner, François ...