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CHARME
2001
Springer
98views Hardware» more  CHARME 2001»
14 years 1 months ago
Hardware Synthesis Using SAFL and Application to Processor Design
Abstract. We survey the work done so far in the FLaSH project (Functional Languages for Synthesising Hardware) in which the core ideas are (i) using a functional language SAFL to d...
Alan Mycroft, Richard Sharp
ICPW
2007
13 years 10 months ago
A practical method for courseware evaluation
As more courseware becomes available, choosing the right functionality for a particular e-learning community is becoming more problematic. Systematic methods for evaluating course...
Aldo de Moor
ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
14 years 19 days ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...
VLSID
2003
IEEE
77views VLSI» more  VLSID 2003»
14 years 9 months ago
A Methodology for Accurate Modeling of Energy Dissipation in Array Structures
There is an increasing need for obtaining a reasonably accurate estimate of energy dissipation in SoC designs. Array structures have a significant contribution to the total system...
Mahesh Mamidipaka, Nikil D. Dutt, Kamal S. Khouri
CC
2007
Springer
14 years 3 months ago
Preprocessing Strategy for Effective Modulo Scheduling on Multi-issue Digital Signal Processors
To achieve high resource utilization for multi-issue Digital Signal Processors (DSPs), production compilers commonly include variants of the iterative modulo scheduling algorithm. ...
Doosan Cho, Ravi Ayyagari, Gang-Ryung Uh, Yunheung...