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GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
14 years 3 months ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...
SAC
2006
ACM
14 years 3 months ago
Building the functional performance model of a processor
In this paper, we present an efficient procedure for building a piecewise linear function approximation of the speed function of a processor with hierarchical memory structure. Th...
Alexey L. Lastovetsky, Ravi Reddy, Robert Higgins
IFL
1997
Springer
153views Formal Methods» more  IFL 1997»
14 years 1 months ago
Common Subexpressions Are Uncommon in Lazy Functional Languages
Common subexpression elimination is a well-known compiler optimisation that saves time by avoiding the repetition of the same computation. In lazy functional languages, referential...
Olaf Chitil
ASPDAC
2005
ACM
125views Hardware» more  ASPDAC 2005»
14 years 2 months ago
A formalism for functionality preserving system level transformations
— With the rise in complexity of modern systems, designers are spending a significant time on at the system level of abstraction. This paper introduces Model Algebra, a formalis...
Samar Abdi, Daniel Gajski
ACL
1998
13 years 10 months ago
PAT-Trees with the Deletion Function as the Learning Device for Linguistic Patterns
In this study, a learning device based on the PATtree data structures was developed. The original PAT-trees were enhanced with the deletion function to emulate human learning comp...
Keh-Jiann Chen, Wen Tsuei, Lee-Feng Chien