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ICCAD
1994
IEEE
131views Hardware» more  ICCAD 1994»
13 years 11 months ago
Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designs
We consider the problem of performance driven lookup-table (LUT) based technology mapping for FPGAs using a general delay model. In the general delay model, each interconnection e...
Hannah Honghua Yang, D. F. Wong
BMCBI
2010
198views more  BMCBI 2010»
13 years 7 months ago
ClustalXeed: a GUI-based grid computation version for high performance and terabyte size multiple sequence alignment
Background: There is an increasing demand to assemble and align large-scale biological sequence data sets. The commonly used multiple sequence alignment programs are still limited...
Taeho Kim, Hyun Joo
WWW
2005
ACM
14 years 1 months ago
Improved timing control for web server systems using internal state information
How to effectively allocate system resource to meet the Service Level Agreement (SLA) of Web servers is a challenging problem. In this paper, we propose an improved scheme for aut...
Xue Liu, Rong Zheng, Jin Heo, Lui Sha
ICASSP
2011
IEEE
12 years 11 months ago
Improving the performance of DSP systems for MIMO processing
While the research into MIMO communications algorithms have reached levels of development that show important wireless systems performance improvements, the development of DSP sys...
Nathaniel Horner, Andres Kwasinski, Antonio Mondra...
ISCAS
2006
IEEE
104views Hardware» more  ISCAS 2006»
14 years 1 months ago
Performance of time-frequency localized and frequency selective filter banks in multicarrier systems
— This paper studies filter bank based multicarrier data transmission over wireless mobile channel. A complex modulated filter bank, based on cosine and sine modulated filter ...
Ari Viholainen, Tero Ihalainen, Markku Renfors