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» On the Utility of Threads for Data Parallel Programming
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ISCA
2011
IEEE
238views Hardware» more  ISCA 2011»
13 years 12 days ago
Rebound: scalable checkpointing for coherent shared memory
As we move to large manycores, the hardware-based global checkpointing schemes that have been proposed for small shared-memory machines do not scale. Scalability barriers include ...
Rishi Agarwal, Pranav Garg, Josep Torrellas
IPPS
2007
IEEE
14 years 3 months ago
Porting the GROMACS Molecular Dynamics Code to the Cell Processor
The Cell processor offers substantial computational power which can be effectively utilized only if application design and implementation are tuned to the Cell architecture. In th...
Stephen Olivier, Jan Prins, Jeff Derby, Ken V. Vu
PDPTA
2003
13 years 10 months ago
Distop: A Low-Overhead Cluster Monitoring System
Current systems for managing workload on clusters of workstations, particularly those available for Linux-based (Beowulf) clusters, are typically based on traditional process-base...
Daniel Andresen, Nathan Schopf, Ethan Bowker, Timo...
ASAP
2008
IEEE
142views Hardware» more  ASAP 2008»
14 years 3 months ago
Managing multi-core soft-error reliability through utility-driven cross domain optimization
As semiconductor processing technology continues to scale down, managing reliability becomes an increasingly difficult challenge in high-performance microprocessor design. Transie...
Wangyuan Zhang, Tao Li
VISUALIZATION
2003
IEEE
14 years 2 months ago
Fast Volume Segmentation With Simultaneous Visualization Using Programmable Graphics Hardware
Segmentation of structures from measured volume data, such as anatomy in medical imaging, is a challenging data-dependent task. In this paper, we present a segmentation method tha...
Anthony Sherbondy, Michael Houston, Sandy Napel