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» On the Verification of Temporal Properties
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DAC
2005
ACM
14 years 8 months ago
IODINE: a tool to automatically infer dynamic invariants for hardware designs
We describe IODINE, a tool to automatically extract likely design properties using dynamic analysis. A practical bottleneck in the formal verification of hardware designs is the n...
Sudheendra Hangal, Naveen Chandra, Sridhar Narayan...
ECCB
2008
IEEE
13 years 7 months ago
Temporal logic patterns for querying dynamic models of cellular interaction networks
Abstract: Models of the dynamics of cellular interaction networks have become increasingly larger in recent years. Formal verification based on model checking provides a powerful t...
Pedro T. Monteiro, Delphine Ropers, Radu Mateescu,...
ICSE
2005
IEEE-ACM
14 years 7 months ago
Real-time specification patterns
Embedded systems are pervasive and frequently used for critical systems with time-dependent functionality. Dwyer et al. have developed qualitative specification patterns to facili...
Sascha Konrad, Betty H. C. Cheng
ICSE
2009
IEEE-ACM
13 years 5 months ago
Slede: Framework for automatic verification of sensor network security protocol implementations
Verifying security properties of protocols requires developers to manually create protocol-specific intruder models, which could be tedious and error prone. We present Slede, a ve...
Youssef Hanna, Hridesh Rajan
DATE
2004
IEEE
134views Hardware» more  DATE 2004»
13 years 11 months ago
Cost-Efficient Block Verification for a UMTS Up-Link Chip-Rate Coprocessor
ASIC designs for future communication applications cannot be simulated exhaustively. Formal Property Checking is a powerful technology to overcome the limitations of current funct...
Klaus Winkelmann, Hans-Joachim Trylus, Dominik Sto...