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IPPS
2007
IEEE
14 years 4 months ago
Load Miss Prediction - Exploiting Power Performance Trade-offs
— Modern CPUs operate at GHz frequencies, but the latencies of memory accesses are still relatively large, in the order of hundreds of cycles. Deeper cache hierarchies with large...
Konrad Malkowski, Greg M. Link, Padma Raghavan, Ma...
ISCC
2005
IEEE
114views Communications» more  ISCC 2005»
14 years 3 months ago
Localized Broadcast Incremental Power Protocol for Wireless Ad Hoc Networks
— As broadcasting is widely used for miscellaneous maintenance operations in wireless ad hoc networks, where energy is a scarce resource, an efficient broadcasting protocol is o...
François Ingelrest, David Simplot-Ryl
DAC
2008
ACM
14 years 11 months ago
The design of a low power carbon nanotube chemical sensor system
This paper presents a hybrid CNT/CMOS chemical sensor system that comprises of a carbon nanotube sensor array and a CMOS interface chip. The full system, including the sensor, con...
Taeg Sang Cho, Kyeong-jae Lee, Jing Kong, Anantha ...
ICC
2007
IEEE
14 years 4 months ago
A Simple Power Margin Quality Measure for Correlated Random Variates Derived from the Normal Distribution
—This paper provides a power-margin-based measure of the quality of computer-generated random variates having a distribution that derives from the multivariate Gaussian distribut...
David J. Young, Norman C. Beaulieu
VLSID
2002
IEEE
79views VLSI» more  VLSID 2002»
14 years 10 months ago
A Power Minimization Technique for Arithmetic Circuits by Cell Selection
As a basic cell of arithmetic circuits, a one-bit full adder and a counter are usually used. Minimizing power consumption of these components is a key issue for low-power circuit ...
Masanori Muroyama, Tohru Ishihara, Akihiko Hyodo, ...