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» On the energy-efficiency of speculative hardware
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MICRO
2000
IEEE
98views Hardware» more  MICRO 2000»
14 years 1 months ago
The store-load address table and speculative register promotion
Register promotion is an optimization that allocates a value to a register for a region of its lifetime where it is provably not aliased. Conventional compiler analysis cannot alw...
Matt Postiff, David Greene, Trevor N. Mudge
ARC
2008
Springer
99views Hardware» more  ARC 2008»
13 years 11 months ago
Accelerating Speculative Execution in High-Level Synthesis with Cancel Tokens
We present an improved method for scheduling speculative data paths which relies on cancel tokens to undo computations in misspeculated paths. Performancewise, this method is consi...
Hagen Gädke, Andreas Koch
MICRO
1993
IEEE
97views Hardware» more  MICRO 1993»
14 years 1 months ago
Register renaming and dynamic speculation: an alternative approach
In this paper, we present a novel mechanism that implements register renaming, dynamic speculation and precise interrupts. Renaming of registers is performed during the instructio...
Mayan Moudgill, Keshav Pingali, Stamatis Vassiliad...
TC
2010
13 years 3 months ago
Speculatively Redundant Continued Logarithm Representation
Continued logarithms, as originally introduced by Gosper, represent a means for exact rational arithmetic, but their application to exact real arithmetic is limited by the uniquene...
Tomas Brabec
ICCD
2002
IEEE
93views Hardware» more  ICCD 2002»
14 years 5 months ago
Speculative Trace Scheduling in VLIW Processors
VLIW processors are statically scheduled processors and their performance depends on the quality of the compiler’s scheduler. We propose a scheduling scheme where the applicatio...
Manvi Agarwal, S. K. Nandy, Jos T. J. van Eijndhov...