415 search results - page 59 / 83 » On the energy-efficiency of speculative hardware |
GLVLSI
2010
IEEE
13 years 9 months ago
2010
IEEE
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...
TROB
2010
13 years 2 months ago
2010
A new approach to a variable stiffness actuator with tunable resonant frequencies is presented in this paper. Variable stiffness actuators have become increasingly important for m...
APCSAC
2007
IEEE
14 years 2 months ago
2007
IEEE
Although they have been the main server technology for many years, multiprocessors are undergoing a renaissance due to multi-core chips and the attractive scalability properties of...
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
Chip Multiprocessors (CMPs) are flexible, high-frequency platforms on which to support Thread-Level Speculation (TLS). However, for TLS to deliver on its promise, CMPs must explo...
ASPLOS
2000
ACM
14 years 23 hour ago
2000
ACM
Processors execute the full dynamic instruction stream to arrive at the final output of a program, yet there exist shorter instruction streams that produce the same overall effec...