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» On the energy-efficiency of speculative hardware
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MICRO
2000
IEEE
118views Hardware» more  MICRO 2000»
14 years 1 days ago
A study of slipstream processors
A slipstream processor reduces the length of a running program by dynamically skipping computation non-essential for correct forward progress. The shortened program runs faster as...
Zachary Purser, Karthik Sundaramoorthy, Eric Roten...
MICRO
1992
IEEE
124views Hardware» more  MICRO 1992»
13 years 11 months ago
A shape matching approach for scheduling fine-grained parallelism
- We present a compilation technique for scheduling parallelism on fine grained asynchronous MIMD systems. The shape scheduling algorithm is introduced that utilizes the flexibilit...
Brian A. Malloy, Rajiv Gupta, Mary Lou Soffa
DATE
2010
IEEE
146views Hardware» more  DATE 2010»
13 years 7 months ago
Automatic pipelining from transactional datapath specifications
Abstract—We present a transactional datapath specification (Tspec) and the tool (T-piper) to synthesize automatically an inpelined implementation from it. T-spec abstractly views...
Eriko Nurvitadhi, James C. Hoe, Timothy Kam, Shih-...
MICRO
2000
IEEE
133views Hardware» more  MICRO 2000»
14 years 1 days ago
Compiler controlled value prediction using branch predictor based confidence
Value prediction breaks data dependencies in a program thereby creating instruction level parallelism that can increase program performance. Hardware based value prediction techni...
Eric Larson, Todd M. Austin
MICRO
2010
IEEE
215views Hardware» more  MICRO 2010»
13 years 6 months ago
A Task-Centric Memory Model for Scalable Accelerator Architectures
This paper presents a task-centric memory model for 1000-core compute accelerators. Visual computing applications are emerging as an important class of workloads that can exploit ...
John H. Kelm, Daniel R. Johnson, Steven S. Lumetta...