Sciweavers

580 search results - page 29 / 116
» On the memory complexity of the forward-backward algorithm
Sort
View
DDECS
2007
IEEE
175views Hardware» more  DDECS 2007»
14 years 2 months ago
Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
IPPS
2010
IEEE
13 years 5 months ago
Dynamic analysis of the relay cache-coherence protocol for distributed transactional memory
Transactional memory is an alternative programming model for managing contention in accessing shared in-memory data objects. Distributed transactional memory (TM) promises to alle...
Bo Zhang, Binoy Ravindran
ISCAS
1994
IEEE
138views Hardware» more  ISCAS 1994»
13 years 11 months ago
High-Throughput Data Compressor Designs Using Content Addressable Memory
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
Ren-Yang Yang, Chen-Yi Lee
CVPR
2010
IEEE
14 years 1 months ago
Fast Sparse Representation with Prototypes
Sparse representation has found applications in numerous domains and recent developments have been focused on the convex relaxation of the 0-norm minimization for sparse coding (i...
Jia-Bin Huang, Ming-Hsuan Yang
ICCV
1995
IEEE
13 years 11 months ago
Object Indexing Using an Iconic Sparse Distributed Memory
A general-purpose object indexingtechnique is described that combines the virtues of principal component analysis with the favorable matching properties of high-dimensional spaces...
Rajesh P. N. Rao, Dana H. Ballard