96 search results - page 5 / 20 » On the optimal design of structured feedback gains for inter... |
ISCA
2008
IEEE
14 years 1 months ago
2008
IEEE
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
CDC
2008
IEEE
14 years 1 months ago
2008
IEEE
We present sufficient conditions for robust relay-delayed semiglobal stabilization of second order systems, which relate the upper bound to an uncertain time delay and the paramete...
SBCCI
2003
ACM
13 years 12 months ago
2003
ACM
Recycling was recently proposed as a system-level design technique to facilitate the building of complex System-on-Chips (SOC) by assembling pre-designed components. Recycling all...
ICCAD
2000
IEEE
13 years 11 months ago
2000
IEEE
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
ICMI
2005
Springer
14 years 6 days ago
2005
Springer
Experience shows that decisions in the early phases of the development of a multimodal system prevail throughout the life-cycle of a project. The distributed architecture and the ...