Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...
Abstract—Optimal power allocation for multi-user amplifyand-forward wireless relay networks in which multiple sourcedestination pairs are assisted by a set of relays is investiga...
Khoa T. Phan, Long Bao Le, Sergiy A. Vorobyov, Tho...
Abstract—Interconnects (wires, buffers, clock distribution networks, multiplexers and busses) consume a significant fraction of total circuit power. In this work, we demonstrat...
In this paper, we introduce a discrete-time model for the complete power supply sub-system that closely approximates the behavior of its circuit-level (i.e., HSpice), continuous-t...
Luca Benini, Giuliano Castelli, Alberto Macii, Enr...
e technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, for example, commonly used instruction-set sim...