464 search results - page 6 / 93 » On the three-dimensional channel routing |
ICCD
2008
IEEE
14 years 6 months ago
2008
IEEE
— The increasing viability of three dimensional (3D) silicon integration technology has opened new opportunities for chip architecture innovations. One direction is in the extens...
ICCD
2004
IEEE
14 years 6 months ago
2004
IEEE
In this paper, we propose a combined channel segmentation and buffer insertion approach, which minimizes the number of buffers inserted while satisfying the delay constraints for ...
ITNG
2008
IEEE
14 years 4 months ago
2008
IEEE
In our previous work, a Multi-Path Routing (MPR) scheme was proposed to maximize the data throughput for torus-based NoCs by utilizing multiple paths for concurrent data transmiss...
ISCAS
2002
IEEE
14 years 2 months ago
2002
IEEE
We address the problem of checking the routability of segmented channels using satisfiability. The segmented channel routing problem arises in the context of row-based field progr...
FPGA
2008
ACM
13 years 11 months ago
2008
ACM
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...