Sciweavers

464 search results - page 83 / 93
» On the three-dimensional channel routing
Sort
View
ASPDAC
2011
ACM
207views Hardware» more  ASPDAC 2011»
13 years 2 months ago
Vertical interconnects squeezing in symmetric 3D mesh Network-on-Chip
Abstract— Three-dimensional (3D) integration and Networkon-Chip (NoC) are both proposed to tackle the on-chip interconnect scaling problems, and extensive research efforts have b...
Cheng Liu, Lei Zhang 0008, Yinhe Han, Xiaowei Li
DCOSS
2011
Springer
12 years 10 months ago
Transmission Control Policy design for decentralized detection in sensor networks
—A Wireless Sensor Network (WSN) deployed for detection applications has the distinguishing feature that sensors cooperate to perform the detection task. Therefore, the decoupled...
Ashraf Tantawy, Xenofon D. Koutsoukos, Gautam Bisw...
HPCA
2009
IEEE
14 years 11 months ago
Prediction router: Yet another low latency on-chip router architecture
Network-on-Chips (NoCs) are quite latency sensitive, since their communication latency strongly affects the application performance on recent many-core architectures. To reduce th...
Hiroki Matsutani, Michihiro Koibuchi, Hideharu Ama...
MICRO
2008
IEEE
131views Hardware» more  MICRO 2008»
14 years 5 months ago
Token flow control
As companies move towards many-core chips, an efficient onchip communication fabric to connect these cores assumes critical importance. To address limitations to wire delay scala...
Amit Kumar 0002, Li-Shiuan Peh, Niraj K. Jha
DATE
2010
IEEE
154views Hardware» more  DATE 2010»
14 years 3 months ago
A method to remove deadlocks in Networks-on-Chips with Wormhole flow control
Networks-on-Chip (NoCs) are a promising interconnect paradigm to address the communication bottleneck of Systems-on-Chip (SoCs). Wormhole flow control is widely used as the trans...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...