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» On two-step routing for FPGAS
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FPGA
2004
ACM
147views FPGA» more  FPGA 2004»
14 years 3 days ago
The SFRA: a corner-turn FPGA architecture
FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better ...
Nicholas Weaver, John R. Hauser, John Wawrzynek
ICCAD
2004
IEEE
114views Hardware» more  ICCAD 2004»
14 years 3 months ago
Simultaneous short-path and long-path timing optimization for FPGAs
This paper presents the Routing Cost Valleys (RCV) algorithm – the first published algorithm that simultaneously optimizes all short- and long-path timing constraints in a Field...
Ryan Fung, Vaughn Betz, William Chow
IPPS
2006
IEEE
14 years 23 days ago
Implementation of a programmable array processor architecture for approximate string matching algorithms on FPGAs
Approximate string matching problem is a common and often repeated task in information retrieval and bioinformatics. This paper proposes a generic design of a programmable array p...
Panagiotis D. Michailidis, Konstantinos G. Margari...
DATE
2002
IEEE
206views Hardware» more  DATE 2002»
13 years 11 months ago
Accurate Area and Delay Estimators for FPGAs
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
Anshuman Nayak, Malay Haldar, Alok N. Choudhary, P...
IFIP
1999
Springer
13 years 11 months ago
Frontier: A Fast Placement System for FPGAs
In this paper we describe Frontier, an FPGA placement system that uses design macro-blocks in conjuction with a series of placement algorithms to achieve highly-routable and high-...
Russell Tessier