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» On two-step routing for FPGAS
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FPGA
2005
ACM
137views FPGA» more  FPGA 2005»
14 years 3 days ago
HARP: hard-wired routing pattern FPGAs
Modern FPGA architectures provide ample routing resources so that designs can be routed successfully. The routing architecture is designed to handle versatile connection configur...
Satish Sivaswamy, Gang Wang, Cristinel Ababei, Kia...
FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
13 years 11 months ago
A crosstalk-aware timing-driven router for FPGAs
As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstal...
Steven J. E. Wilton
EH
2004
IEEE
131views Hardware» more  EH 2004»
13 years 10 months ago
Swarm Intelligence for Digital Circuits Implementation on Field Programmable Gate Arrays Platforms
Field programmable gate arrays (FPGAs) are becoming increasingly important implementation platforms for digital circuits. One of the necessary requirements to effectively utilize ...
Ganesh K. Venayagamoorthy, Venu G. Gudise
FPGA
2008
ACM
163views FPGA» more  FPGA 2008»
13 years 8 months ago
TORCH: a design tool for routing channel segmentation in FPGAs
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
Mingjie Lin, Abbas El Gamal
DAC
1994
ACM
13 years 10 months ago
Performance-Driven Simultaneous Place and Route for Row-Based FPGAs
Sequential place and route tools for FPGAs are inherently weak at addressing both wirability and timing optimizations. This is primarily due to the difficulty in predicting these ...
Sudip Nag, Rob A. Rutenbar