48 search results - page 2 / 10 » On-Chip Test Infrastructure Design for Optimal Multi-Site Te... |
DAC
2001
ACM
14 years 9 months ago
2001
ACM
Crosstalk effects degrade the integrity of signals traveling on long interconnects and must be addressed during manufacturing testing. External testing for crosstalk is expensive ...
DAC
1999
ACM
14 years 27 days ago
1999
ACM
As the family of Alpha microprocessors continues to scale into more advanced technologies with very high frequency edge rates and multiple layers of interconnect, the issue of cha...
GLOBECOM
2009
IEEE
14 years 13 days ago
2009
IEEE
Abstract--This paper presents several on-chip antenna structures that may be fabricated with standard CMOS technology for use at millimeter wave frequencies. On-chip antennas for w...
UML
2004
Springer
14 years 1 months ago
2004
Springer
Abstract. In this paper, we propose a verification methodology for System-OnChip (SoC) design using Unified Modeling Language (UML). We introduce UML as a formal model to analyze a...
PATMOS
2000
Springer
14 years 4 days ago
2000
Springer
Abstract. Reduction of chip packaging and cooling costs for deep sub-micron SystemOn-Chip (SOC) designs is an emerging issue. We present a simulation-based methodology able to real...