704 search results - page 136 / 141 » On-chip logic minimization |
FCCM
2000
IEEE
14 years 3 months ago
2000
IEEE
Simplifying the programming models is paramount to the success of reconfigurable computing. We apply the principles of object-oriented programming to the design of stream archite...
VTS
2000
IEEE
14 years 3 months ago
2000
IEEE
Hardware duplication techniques are widely used for concurrent error detection in dependable systems to ensure high availability and data integrity. These techniques are vulnerabl...
DATE
1999
IEEE
14 years 3 months ago
1999
IEEE
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
FCCM
1999
IEEE
14 years 3 months ago
1999
IEEE
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
VLSID
1996
IEEE
14 years 3 months ago
1996
IEEE
W epropose a coverage metric and a two-pass test generation method for path delay faults in combinational logic circuits. The coverage is measured for each line with a rising and ...