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DAC
2006
ACM
14 years 8 months ago
DAG-aware AIG rewriting a fresh look at combinational logic synthesis
This paper presents a technique for preprocessing combinational logic before technology mapping. The technique is based on the representation of combinational logic using And-Inve...
Alan Mishchenko, Satrajit Chatterjee, Robert K. Br...
VLSID
2002
IEEE
128views VLSI» more  VLSID 2002»
14 years 8 months ago
System-Level Point-to-Point Communication Synthesis using Floorplanning Information
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
Jingcao Hu, Yangdong Deng, Radu Marculescu
ICCAD
2003
IEEE
152views Hardware» more  ICCAD 2003»
14 years 4 months ago
Fredkin/Toffoli Templates for Reversible Logic Synthesis
Reversible logic has applications in quantum computing, low power CMOS, nanotechnology, optical computing, and DNA computing. The most common reversible gates are the Toffoli gate...
Dmitri Maslov, Gerhard W. Dueck, D. Michael Miller
ICECCS
1997
IEEE
97views Hardware» more  ICECCS 1997»
13 years 12 months ago
A Synthesis Method for Fault-tolerant and Flexible Multipath Routing Protocols
Design of practical routing protocols is complex and dificult due to complicated requirements of faulttolerance and flexibility. The protocol is defined to be fault-tolerant if me...
Yutaka Hatanaka, Masahide Nakamura, Yoshiaki Kakud...
ASPDAC
2008
ACM
145views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Mixed integer linear programming-based optimal topology synthesis of cascaded crossbar switches
- We present a topology synthesis method for high performance System-on-Chip (SoC) design. Our method provides an optimal topology of on-chip communication network for the given ba...
Minje Jun, Sungjoo Yoo, Eui-Young Chung