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VLSID
2006
IEEE
169views VLSI» more  VLSID 2006»
16 years 4 months ago
A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks
The two dominant architectural choices for implementing efficient communication fabrics for SoC's have been transaction-based buses and packet-based Networks-onChip (NoC). Bo...
Thomas D. Richardson, Chrysostomos Nicopoulos, Don...
DATE
2008
IEEE
126views Hardware» more  DATE 2008»
15 years 10 months ago
In-band Cross-Trigger Event Transmission for Transaction-Based Debug
Cross-trigger, the mechanism to trigger activities in one debug entity from debug events happened in another debug entity, is a very useful technique for debugging applications in...
Shan Tang, Qiang Xu
CODES
2003
IEEE
15 years 9 months ago
RTOS scheduling in transaction level models
the level of abstraction in system design promises to enable faster exploration of the design space at early stages. While scheduling decision for embedded software has great impa...
Haobo Yu, Andreas Gerstlauer, Daniel Gajski
ICA3PP
2009
Springer
15 years 8 months ago
A Software Transactional Memory Service for Grids
In-memory data sharing for grids allow location-transparent access to data stored in volatile memory. Existing Grid middlewares typ- ically support only explicit data transfer betw...
Kim-Thomas Möller, Marc-Florian Müller, ...
SBACPAD
2004
IEEE
144views Hardware» more  SBACPAD 2004»
15 years 5 months ago
Improving Server Performance on Transaction Processing Workloads by Enhanced Data Placement
Modern servers access large volumes of data while running commercial workloads. The data is typically spread among several storage devices (e.g. disks). Carefully placing the data...
Juan Rubio, Charles Lefurgy, Lizy Kurian John