26 search results - page 4 / 6 » Optimal Clock Skew Scheduling Tolerant to Process Variations |
ISCA
2007
IEEE
14 years 5 months ago
2007
IEEE
Process variation affects processor pipelines by making some stages slower and others faster, therefore exacerbating pipeline unbalance. This reduces the frequency attainable by t...
ISQED
2007
IEEE
14 years 5 months ago
2007
IEEE
With its advantages in wirelength reduction and routing flexibility compared with Manhattan routing, X-architecture has been proposed and applied to modern IC design. As a critic...
ASPDAC
2005
ACM
14 years 4 months ago
2005
ACM
－In high performance systems, process variations and fluctuations of operating environments have significant impact on the clock skew. Recently, hybrid structures of H-tree and m...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
As the VLSI technology scales towards the nanometer regime, circuit performance is increasingly affected by variations. These variations need to be considered at an early stage in...
DAC
2008
ACM
14 years 20 days ago
2008
ACM
Clock skew scheduling has been traditionally considered as a tool for improving the clock period in a sequential circuit. Timing slack is "stolen" from fast combinationa...