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EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
14 years 1 months ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko
VLDB
1992
ACM
151views Database» more  VLDB 1992»
14 years 27 days ago
Parallelism in a Main-Memory DBMS: The Performance of PRISMA/DB
This paper evaluates the performance of the parallel, main-memory DBMS, PRISMA/DB. First, an architecture for parallel query execution is presented. A performance model for the ex...
Annita N. Wilschut, Jan Flokstra, Peter M. G. Aper...
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
14 years 26 days ago
Use ECP, not ECC, for hard failures in resistive memories
As leakage and other charge storage limitations begin to impair the scalability of DRAM, non-volatile resistive memories are being developed as a potential replacement. Unfortunat...
Stuart E. Schechter, Gabriel H. Loh, Karin Straus,...
CASES
2007
ACM
14 years 26 days ago
Rethinking custom ISE identification: a new processor-agnostic method
The last decade has witnessed the emergence of the Application Specific Instruction-set Processor (ASIP) as a viable platform for embedded systems. Extensible ASIPs allow the user...
Ajay K. Verma, Philip Brisk, Paolo Ienne
CF
2007
ACM
14 years 26 days ago
Parallel genomic sequence-search on a massively parallel system
In the life sciences, genomic databases for sequence search have been growing exponentially in size. As a result, faster sequencesearch algorithms to search these databases contin...
Oystein Thorsen, Brian E. Smith, Carlos P. Sosa, K...
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