Use ECP, not ECC, for hard failures in resistive memories

As leakage and other charge storage limitations begin to impair the scalability of DRAM, non-volatile resistive memories are being developed as a potential replacement. Unfortunately, current error-correction techniques are poorly suited to this emerging class of memory technologies. Unlike DRAM, PCM and other resistive memories have wear lifetimes, measured in writes, that are sufficiently short to make cell failures common during a system’s lifetime. However, resistive memories are much less susceptible to transient faults than DRAM. The Hamming-based ECC codes used in DRAM are designed to handle transient faults with no effective lifetime limits, but ECC codes applied to resistive memories would wear out faster than the cells they are designed to repair. This paper proposes Error-Correcting Pointers (ECP), a new approach to error correction optimized for memories in which errors are the result of permanent cell failures that occur, and are immediately detectable, at write time. ...

• Type: Conference
• Year: 2010
• Where: ISCA
• Authors: Stuart E. Schechter, Gabriel H. Loh, Karin Straus, Doug Burger
• Keywords: Hardware, ISCA 2010, Non-volatile Resistive Memories, Resistive Memories, Transient Faults