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» Optimal Hardware Pattern Generation for Functional BIST
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DATE
2002
IEEE
114views Hardware» more  DATE 2002»
14 years 1 months ago
A Video Compression Case Study on a Reconfigurable VLIW Architecture
In this paper, we investigate the benefits of a flexible, application-specific instruction set by adding a run-time Reconfigurable Functional Unit (RFU) to a VLIW processor. Preli...
Davide Rizzo, Osvaldo Colavin
HPCA
2004
IEEE
14 years 9 months ago
Creating Converged Trace Schedules Using String Matching
This paper focuses on generating efficient software pipelined schedules for in-order machines, which we call Converged Trace Schedules. For a candidate loop, we form a string of t...
Satish Narayanasamy, Yuanfang Hu, Suleyman Sair, B...
HUC
2005
Springer
14 years 2 months ago
Fast and Robust Interface Generation for Ubiquitous Applications
Abstract. We present Supple, a novel toolkit which automatically generates interfaces for ubiquitous applications. Designers need only specify declarative models of the interface a...
Krzysztof Gajos, David B. Christianson, Raphael Ho...
DATE
2010
IEEE
193views Hardware» more  DATE 2010»
14 years 1 months ago
Coordinated resource optimization in behavioral synthesis
Abstract—Reducing resource usage is one of the most important optimization objectives in behavioral synthesis due to its direct impact on power, performance and cost. The datapat...
Jason Cong, Bin Liu, Junjuan Xu
PROCEDIA
2010
75views more  PROCEDIA 2010»
13 years 7 months ago
Two derivative-free optimization algorithms for mesh quality improvement
High-quality meshes are essential in the solution of partial differential equations (PDEs), which arise in numerous science and engineering applications, as the mesh quality aff...
Jeonghyung Park, Suzanne M. Shontz