261 search results - page 51 / 53 » Optimal Hardware Pattern Generation for Functional BIST |
FPGA
2010
ACM
14 years 4 months ago
2010
ACM
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
ACL2
2006
ACM
14 years 1 months ago
2006
ACM
A verifying compiler is one that emits both object code and a proof of correspondence between object and source code.1 We report the use of ACL2 in building a verifying compiler f...
SIGMETRICS
2008
ACM
13 years 7 months ago
2008
ACM
Fine-grained network measurement requires routers and switches to update large arrays of counters at very high link speed (e.g. 40 Gbps). A naive algorithm needs an infeasible amo...
SIGGRAPH
2010
ACM
13 years 12 months ago
2010
ACM
The NVIDIA® OptiX™ ray tracing engine is a programmable system designed for NVIDIA GPUs and other highly parallel architectures. The OptiX engine builds on the key observation ...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
As minimum feature sizes continue to shrink, patterned features have become significantly smaller than the wavelength of light used in optical lithography. As a result, the requir...