Sciweavers

186 search results - page 12 / 38
» Optimal Hardware Software Partitioning for Concurrent Specif...
Sort
View
PASTE
2004
ACM
14 years 1 months ago
Dynamically inferring temporal properties
Model checking requires a specification of the target system’s desirable properties, some of which are temporal. Formulating a property of the system based on either its abstrac...
Jinlin Yang, David Evans
EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
14 years 16 days ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko
IESS
2007
Springer
162views Hardware» more  IESS 2007»
14 years 2 months ago
Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs
Abstract This paper presents an embedded system design toolchain for automatic generation of parallel code runnable on symmetric multiprocessor systems from an initial sequential s...
Fabrizio Ferrandi, Luca Fossati, Marco Lattuada, G...
CODES
2005
IEEE
14 years 2 months ago
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
Girish Venkataramani, Tiberiu Chelcea, Seth Copen ...
IWPC
2007
IEEE
14 years 2 months ago
Empirical Evaluation of a UML Sequence Diagram with Adornments to Support Understanding of Thread Interactions
Programs that use multi-threaded concurrency are known to be difficult to design. Moreover, research in computer-science education suggests that concurrency and synchronization co...
Shaohua Xie, Eileen Kraemer, R. E. Kurt Stirewalt