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148
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ISHPC
2003
Springer
15 years 7 months ago
Code and Data Transformations for Improving Shared Cache Performance on SMT Processors
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
Dimitrios S. Nikolopoulos
138
Voted
CSMR
2007
IEEE
15 years 8 months ago
Online Construction of Dynamic Object Process Graphs
A dynamic object process graph is a view on the control flow graph from the perspective of a single object. It has been shown that such a graph can be a useful starting point for...
Jochen Quante
CGO
2006
IEEE
15 years 8 months ago
A Self-Repairing Prefetcher in an Event-Driven Dynamic Optimization Framework
Software prefetching has been demonstrated as a powerful technique to tolerate long load latencies. However, to be effective, prefetching must target the most critical (frequently...
Weifeng Zhang, Brad Calder, Dean M. Tullsen
136
Voted
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
15 years 7 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
122
Voted
MICRO
2003
IEEE
142views Hardware» more  MICRO 2003»
15 years 7 months ago
Hardware Support for Control Transfers in Code Caches
Many dynamic optimization and/or binary translation systems hold optimized/translated superblocks in a code cache. Conventional code caching systems suffer from overheads when con...
Ho-Seop Kim, James E. Smith