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» Optimal Topology Design for Overlay Networks
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DATE
2010
IEEE
118views Hardware» more  DATE 2010»
13 years 6 months ago
Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
Minje Jun, Sungroh Yoon, Eui-Young Chung
NOCS
2007
IEEE
14 years 2 months ago
On the Design of a Photonic Network-on-Chip
Recent remarkable advances in nanoscale siliconphotonic integrated circuitry specifically compatible with CMOS fabrication have generated new opportunities for leveraging the uni...
Assaf Shacham, Keren Bergman, Luca P. Carloni
ITCC
2005
IEEE
14 years 1 months ago
A RDT-Based Interconnection Network for Scalable Network-on-Chip Designs
The interconnection network plays an important role in the performance and energy consumption of a Networkon-Chip (NoC) system. In this paper, we propose a RDT(2,2,1)/α-based int...
Yang Yu, Mei Yang, Yulu Yang, Yingtao Jiang
INFOCOM
2009
IEEE
14 years 2 months ago
Structured Admission Control Policy in Heterogeneous Wireless Networks with Mesh Underlay
—In this paper, we investigate into optimal admission control policies for Heterogeneous Wireless Networks (HWN), considering an integration of wireless mesh networks with an ove...
Amin Farbod, Ben Liang
MOBICOM
2003
ACM
14 years 29 days ago
Topology control for wireless sensor networks
We consider a two-tiered Wireless Sensor Network (WSN) consisting of sensor clusters deployed around strategic locations and base-stations (BSs) whose locations are relatively fl...
Jianping Pan, Yiwei Thomas Hou, Lin Cai, Yi Shi, S...