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ICCAD
2001
IEEE
84views Hardware» more  ICCAD 2001»
14 years 5 months ago
Minimum-Buffered Routing of Non-Critical Nets for Slew Rate and Reliability Control
In high-speed digital VLSI design, bounding the load capacitance at gate outputs is a well-known methodology to improve coupling noise immunity, reduce degradation of signal trans...
Charles J. Alpert, Andrew B. Kahng, Bao Liu, Ion I...
ASPLOS
1998
ACM
14 years 17 days ago
Compiler-Controlled Memory
Optimizations aimed at reducing the impact of memory operations on execution speed have long concentrated on improving cache performance. These efforts achieve a reasonable level...
Keith D. Cooper, Timothy J. Harvey
DAC
1997
ACM
14 years 15 days ago
COSYN: Hardware-Software Co-Synthesis of Embedded Systems
: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In t...
Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. J...
ECCV
2002
Springer
14 years 10 months ago
Robust Parameterized Component Analysis
Principal ComponentAnalysis (PCA) has been successfully applied to construct linear models of shape, graylevel, and motion. In particular, PCA has been widely used to model the var...
Fernando De la Torre, Michael J. Black
ICIP
2003
IEEE
14 years 10 months ago
A hierarchical statistical modeling approach for the unsupervised 3D reconstruction of the scoliotic spine
In this paper, we propose a new and accurate 3D reconstruction technique for the scoliotic spine from a pair planar and conventional radiographic images (postero-anterior and late...
Said Benameur, Max Mignotte, Stefan Parent, Hubert...