A significant fraction of the total power in highly synchronous systems is dissipated over clock networks. Hence, low-power clocking schemes would be promising approaches for futu...
Matthew Cooke, Hamid Mahmoodi-Meimand, Kaushik Roy
Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because the wires do not scale as fast as the device...
Ray Robert Rydberg III, Jabulani Nyathi, Jos&eacut...
We discuss the problem of detecting errors in measurements of the total delay experienced by packets transmitted through a wide-area network. We assume that we have measurements o...
Abstract—In wireless sensor networks, asynchronous sleepwake scheduling protocols can significantly reduce energy consumption without incurring the communication overhead for cl...
The clock signal and clock skew become more and more important for the circuit performance. Since there are salient shortcomings in the conventional topology construction algorith...